Cavium, Inc. - San Jose, CA
| Contribute to the development of one or more Coprocessor units, industry standard high-speed interfaces for Cavium’s next generation Multi-core embedded processor family Seeking highly-motivated soon-to-be-graduated Masters, or PhD level candidates to fill positions in our San Jose, CA location. Responsibilities: Work with the architecture team, and as a design-team member, shape the micro-architecture of the chip, and write specifications for the relevant block, micro-architecture of the block, design implementation using RTL coding techniques, Synthesis, place & route and timing sign off. Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plan, coverage analysis and full chip simulation plus debug. Work with the physical design teams in aiding the implementation of the functional blocks. Requirements: MS/PhD in EE/CE required with experience in RTL design of submicron SOC products (e,g; Microprocessor based SOC’s). Experience in Micro-architecture for the complex Custom/ASIC products focusing in any one/more areas: NPU, Embedded Processors, DSP, Graphics, and/or general purpose microprocessors. RTL design experience, Synthesis, static timing closure, formal verification, gate-level simulations, and block-level function verification. Design knowledge of one/more industry standard bus interfaces (PCIe, SPI, SRIO, USB, XAUI, SGMII etc. ) and memory interfaces (DDR2, DDR3 etc;) is a plus. Experience in interfacing with architecture and Physical implementation teams is a plus. Hands-on experience for all aspects of chip-development process with proficiency in front-end design tools and methodologies is a plus. Experience in designing high-speed ( >1 GHz) /high-performance embedded processor SOC products is a plus. Knowledge of scripting languages such as Perl, Tcl and UNIX shell etc. is desirable. Must possess good communication skills. Self-driven individual and a good team player. Cavium is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, religion, color national origin, sex, age status as a protected veteran, or status as a qualified individual with disability. |
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